Low power architectures for embedded automatic speech recognition
Epson 03 (2005-09)
Research Engineer: Ed Dunnachie
Sponsor: Dr David Crawford, Epson Scotland Design Centre
Academic Supervision: TBC
Embedded Automatic Speech Recognition (EASR) presents a number of challenging technical problems to be overcome, one of which is the need to strike an appropriate balance between the complexity required to achieve reliable speech recognition, and keeping the cost and power consumption to a minimum. This project will investigate low-power architectures for EASR, and will encompass algorithmic optimisation as well as hardware/software partitioning techniques.
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