Kurian Oommen


Modelling and architectural investigation of networking SoCs

Motorola 04 (2001-05)

Research Engineer: Kurian Oommen
Sponsor: Motorola
Academic Supervision: Dr David Harle, University of Strathclyde

The research programme will consist of some combination of the following:

Modelling of a Motorola switch fabric

  • The switch fabric in question is a strategic technology for Motorola, as Motorola moves away from bus based architectures for high performance SoCs. One particular instance of this fabric will already have been modelled by Motorola, in Australia, St Petersburg, and elsewhere. However, there will in future be many variants on this basic architecture, and the research programme will involve extending this model to deal with any of these possible variants, working with these groups and the fabric’s designers in Phoenix, Arizona. The model will be written using SystemC 2.0, the latest version of systemC, which is a developing industry standard in the C++ modelling arena.
  • Design of a Performance Monitoring block for a RapidIO switch RapidIO is a packet based interconnect protocol. This interconnect is intended to replace the more traditional bus based architectures for high performance boards and boxes. In order to gather performance data about the use of RapidIO, a performance monitoring block will be designed into Motorola’s first RapidIO enabled product, a RIO switch / PowerPC bridge hybrid called Layline. The work will involve contributing to the specification and doing the design and test for this block.
  • Investigation of future networking architectures. The second stage of the research programme will be to investigate future high performance SoC architectures for the networking market. This may involve hardware architectures, s/w architectures, the system level environment and the applications that they address.

  • Research

  • Login




  • Click to visit our educational website

  • Archives