The future role of RapidIO in communications devices
Motorola 03 (1999-2003)
Research Engineer: Martin McKenny
Sponsor: Motorola
Academic Supervision: Dr David Harle, University of Strathclyde
The RapidIO interconnect is designed to be compatible with most modern popular integrated communications processors. The aim of RapidIO is to provide high speed, low latency, packet switched, point-to-point connections between system devices, thus addressing the industry need for reliability, increased bandwidth and faster bus speeds in an intra-system interconnect.
The initial project objective is to identify the role which RapidIO has to play in the future of communications device interconnect with the intention that this initial research will uncover some of the core problems facing the industry, providing further opportunities to develop research in this area.
Possible areas of research are likely to include the requirement for modeling of communications over the RapidIO interconnect architecture in order to quantify the challenges and limitations of RapidIO based systems.
The project doctoral thesis was submitted in February 2004 and the student graduated in July 2004. He is employed by Motorola.
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